The inherent limits of bus architectures have sparked wide-spread interest in switched interconnect technologies such as RapidIO and PCI Express, whose many high-speed point-to-point connections deliver high aggregate bandwidths on a flattened architecture,
utilizing fewer pins and operating over greater transmission distances.In light of these advantages, this document proposes to expand the potential features of Common Mezzanine Cards (CMC) by defining a standard by which switched interconnect technologies can be integrated into these cards.